AK8133V 데이터 시트보기 (PDF) - Asahi Kasei Microdevices
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AK8133V Datasheet PDF : 10 Pages
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AK8133
Output clock frequency selection
The AK8133 generates a range of low-jitter and high-accuracy clock frequencies with two built-in PLLs and
provides to up to four assigned outputs. A frequency selection at assigned output pin is configured by
pin-setting of S0 (Pin2), S1 (Pin3), S2(Pin4) and S3 (Pin14).
The selectable frequency is shown in Table 2 and Table2.
Selection Pin
S3(Pin14)
L
H
Output Frequency(MHz)
CLK1(Pin 7)
36.864
24.576
Table 1: CLK1 Clock output Frequency
Sampling
Frequency
(kHz)
48.0
44.1
32.0
192.0
88.2
96.0
64.0
16.0/22.05
Selection Pin
S2
(Pin 4)
L
L
L
L
H
H
H
H
S1
(Pin 3)
L
L
H
H
L
L
H
H
S0
(Pin 2)
L
H
L
H
L
H
L
H
Clock Output Frequency (MHz)
CLK2
256fs
(Pin 8)
12.288
11.2896
8.192
49.152
22.5792
24.576
16.384
4.096
CLK3
384fs
(Pin 10)
18.432
16.9344
12.288
73.728
33.8688
36.864
24.576
8.4672
CLK4
(Pin 11)
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
16.9344
Table 2: CLK2-4 Clock output Frequency
MS0930-E-03
-5-
May-11
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