NJU6682CH 데이터 시트보기 (PDF) - Japan Radio Corporation
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NJU6682CH Datasheet PDF : 58 Pages
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NJU6682
3-21)Power Save
When both of Display OFF and Static Drive ON are executed( its sequence is not required ), the internal circuits go to
the Power Saving Mode and the operating current is reduced as same as the stand by current.
The internal status in this Power Save Mode is shown in follows;
1:The operation of both the Oscillation Circuits and the Internal Power Supply Circuits is stopped.
2:LCD driving is stopped. Segment and Common drivers output Vdd level voltage.
3:Both the display data and the operating mode just before the Power Save Mode is kept.
4:All of the LCD driving bias voltage is fixed to the VDD level.
*1 In the Power Save sequence, the Power Save Mode is started after the second instruction (Static Drive ON).
*2 In the Power Save release sequence, the Power Save Mode is released after the Static Drive OFF instruction.The
Display ON instruction can input at any timming after the Static Drive OFF instruction in Power Save release
sequence.
*3 LCD driving signal isn’t output until the xexection of the Driver Outputs ON instruction.
*4 In case of the external power supply for LCD driving, it should be turn off and made condition like as disconnection or
connection to VDD before the Power Save Mode or at the same time. In this time, VOUT terminal should be made
codition like as disconection or connection to the lowest voltage of the system.
❍Power Save Sequence
Display OFF
Static Drive ON
Driver Outputs OFF
❍Power Save Release Sequence
Static Drive OFF
Display ON
(Wait Time)
Driver Outputs ON
❈NJU6682 spends the current regularly without the execution of the Driver Outputs OFF instruction. The LCD drive
signal will not be output until the Driver Outputs ON instruction is done.
3-22)ADC Select
This instruction defines the correspondence of X Address of the display RAM with the Segment Driver Outputs.
By using of this instruction, it is possible to invert the sequence of the Segment Driver Output. Therefore, the limitation like
a arrangement of IC with LCD module making will decrease.
(R/W)
A0 RD WR D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
01000011000
*
*
*
*
*
*
*D
* : Don’t Care
D=0:Clockwise Output (Normal)
D=1:Counterclockwise Output (Inverting)
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