U637256 데이터 시트보기 (PDF) - Simtek Corporation
부품명
상세내역
일치하는 목록
U637256 Datasheet PDF : 14 Pages
| |||
Read Cycle 1: Ai-controlled (during Read cycle: E = G = VIL, W = VIH)f
Ai
DQi
Output
tcR (1)
Address Valid
ta(A) (2)
Previous Data Valid
tv(A) (9)
Output Data Valid
Read Cycle 2: G-, E-controlled (during Read cycle: W = VIH)g
Ai
E
G
DQi
Output
ICC
tcR (1)
Address Valid
ta(A) (2)
ta(E) (3)
ten(E) (7)
ta(G) (4)
High Impedance
ACTIVE
STANDBY
ten(G) (8)
tPU (10)
tdis(E) (5)
tPD (11)
tdis(G) (6)
Output Data Valid
U637256
No.
Switching Characteristics
Write Cycle
12 Write Cycle Time
13 Write Pulse Width
14 Write Pulse Width Setup Time
15 Address Setup Time
16 Address Valid to End of Write
17 Chip Enable Setup Time
18 Chip Enable to End of Write
19 Data Setup Time to End of Write
20 Data Hold Time after End of Write
21 Address Hold after End of Write
22 W LOW to Output in High-Zh, i
23 W HIGH to Output in Low-Z
Symbol
Alt. #1 Alt. #2 IEC
tAVAV
tWLWH
tAVWL
tAVWH
tELWH
tDVWH
tWHDX
tWHAX
tWLQZ
tWHQX
tAVAV
tcW
tw(W)
tWLEH tsu(W)
tAVEL
tsu(A)
tAVEH tsu(A-WH)
tsu(E)
tELEH
tw(E)
tDVEH
tsu(D)
tEHDX
th(D)
tEHAX
th(A)
tdis(W)
ten(W)
Min.
70
55
55
0
55
55
55
30
0
0
5
August 15, 2006
STK Control #ML0054
5
Rev 1.1
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
ns
ns
Share Link: 