STV8172A 데이터 시트보기 (PDF) - STMicroelectronics

부품명

상세내역

일치하는 목록

STV8172A

Vertical deflection booster for 3 App TV/monitor applications with 70 V flyback generator

STMicroelectronics 

Application Hints

STV8172A

4.1.1.1 Centering

Display will be centered (null mean current in yoke) when voltage on pin 7 is (R1 is negligible):

V7

=

V-----M------+2-----V-----m---

×

⎛

⎜

⎝

-R----2---R--+--2---R-----3- ⎠⎟⎞

4.1.1.2 Peak Current

IP = (---V----M------2-–----V----m------) × -R----1-R---x--2-R-----3-

Example: for Vm = 2 V, VM = 5 V and IP = 1 A

Choose R1 in the1 Ω range, for instance R1=1 Ω

From equation of peak current:

RR-----23-- = -2--V--×---M--I--P--–----×-V---R-m----1- = 23--

Then choose R2 or R3. For instance, if R2 = 10 kΩ, then R3 = 15 kΩ

Finally, the bias voltage on pin 7 should be:

V7 = -V----M------+2-----V----m---- × 1-----+---1---RR---------32---- = -72-- × 2---1-.--5- = 1.4V

4.1.2

Ripple Rejection

When both ramp signal and bias are provided by the same driver IC, you can gain natural rejection

of any ripple caused by a voltage drop in the ground (see Figure 5), if you manage to apply the

same fraction of ripple voltage to both booster inputs. For that purpose, arrange an intermediate

point in the bias resistor bridge, such that (R8 / R7) = (R3 / R2), and connect the bias filtering

capacitor between the intermediate point and the local driver ground. Of course, R7 should be

connected to the booster reference point, which is the ground side of R1.

Figure 5: Ripple Rejection

Reference

Voltage

R9

Ramp

Signal

Driver

Ground

6

R8 00 00 00 00R7

Power

Amplifier

7+

1-

4

3

2

Flyback

Generator

5

Thermal

Safety

Rd

Yoke

Ly

R3

00 00

Source of Ripple

R2

R1

0000

6/14

Share Link: