ST619LB(2007) 데이터 시트보기 (PDF) - STMicroelectronics
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ST619LB Datasheet PDF : 16 Pages
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ST619LB
3
Operating principle
Operating principle
The ST619LB is able to provide a regulated 5 V output from a 2 V to 3.6 V (two battery cells)
input. Internal charge pump and external capacitors generate the 5 V output, eliminating the
need for inductors. The output voltage is regulated to 5 V, ±4 % by a pulse skipping
controller that turns on the charge pump when the output voltage begins to drop. To
maintain the greatest efficiency the internal charge pump of the device operates as a
voltage doubler when VI ranges from 3.0 V to 3.6 V and as a voltage triple when VI ranges
from 2.0 V to 2.5 V.
When VI ranges from 2.5 V to 3.0 V, the ST619LB switches between doubler and triple
mode on alternating cycles, making a 2.5 x VI charge pump. To further enhance the
efficiency over the input range, an internal comparator selects the higher of VI or VO to run
the ST619LB's circuitry. With VI = 2 V and IO = 20 mA the typical efficiency value is 80%.
In triple mode (see block diagram), when the S1 switches close, the S2 switches open and
capacitors C1 and C2 charge up to VI. On the second half of the cycle, C1 and C2 are
connected in series between IN and OUT when the S1 switches open and S2 switches
close. In the doubler mode only C2 is used. During one oscillator cycle, energy is transferred
from the input to the charge pump capacitors, and then from the charge pump capacitors to
the output capacitors and load. The number of cycles within a given time frame increases as
the load increases or as the input supply voltage decreases. In the limiting case, the charge
pumps operate continuously, and the oscillator frequency is nominally 500 kHz.
3.1
Shut down mode
The ST619LB enters low power shut down mode when SHDN is a logic high. In shut down
mode, OUT is disconnected from the IN and VO falls to 0V. The SHDN pin is connected to
ground for normal operation. SHDN is a CMOS compatible input.
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