Fast, Low-Voltage, Dual 4Ω SPDT
CMOS Analog Switches
MAX4635/MAX4636
VIN
LOGIC
INPUT
V+
NC_ or NO_
NO_ or NC_
V+
COM_
IN_
GND
VOUT
RL
CL
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 1a. Switching Time
MAX4635/MAX4636
V+
V+
VIN
NC_ or NO_
COM_
NO_ or NC_
LOGIC
INPUT
IN_
GND
VOUT
RL
CL
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 1b. Break-Before-Make Interval
VIH + 0.5V
LOGIC
INPUT
0
SWITCH
OUTPUT
0
tr < 5ns
tf < 5ns
50%
tOFF
VOUT 0.9 ✕ V0UT
0.9 ✕ VOUT
tON
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
VIH + 0.5V
LOGIC
50%
INPUT
0
tr < 5ns
tf < 5ns
VOUT
0.9 ✕ VOUT
tD
MAX4635/MAX4636
VGEN
RGEN NC_
OR NO_
GND
V+
V+
COM_
IN
VINL TO VINH
VOUT
CL
VOUT
IN
OFF
∆VOUT
OFF
ON
ON
OFF
OFF
IN
Q = (∆VOUT)(CL)
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 2. Charge Injection
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