datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

MAX1652 데이터 시트보기 (PDF) - Maxim Integrated

부품명
상세내역
일치하는 목록
MAX1652 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
High-Efficiency, PWM, Step-Down
DC-DC Controllers in 16-Pin QSOP
Pin Description
PIN NAME
FUNCTION
1
SS
Soft-Start Timing Capacitor Connection. Ramp time to full current limit is approximately 1ms/nF.
Secondary Winding Feedback Input. Normally connected to a resistor divider from an auxiliary output.
SECFB Don’t leave SECFB unconnected.
(MAX1652/ MAX1652: SECFB regulates at VSECFB = 2.50V. Tie to VL if not used.
MAX1654) MAX1654: SECFB regulates at VSECFB = 0V. Tie to a negative voltage through a high-value current-
2
limiting resistor (IMAX = 100µA) if not used.
SKIP
Disables pulse-skipping mode when high. Connect to GND for normal use. Don’t leave SKIP unconnected.
(MAX1653/ With SKIP grounded, the device will automatically change from pulse-skipping operation to full PWM opera-
MAX1655) tion when the load current exceeds approximately 30% of maximum (Table 3).
3
REF
Reference Voltage Output. Bypass to GND with 0.33µF minimum.
4
GND
Low-Noise Analog Ground and Feedback Reference Point
Oscillator Synchronization and Frequency Select. Tie to GND or VL for 150kHz operation; tie to REF for
5
SYNC 300kHz operation. A high-to-low transition begins a new cycle. Drive SYNC with 0 to 5V logic levels (see the
Electrical Characteristics table for VIH and VIL specifications). SYNC capture range is 190kHz to 340kHz.
6
SHDN
Shutdown Control Input, active low. Logic threshold is set at approximately 1V (VTH of an internal N-channel
MOSFET). Tie SHDN to V+ for automatic start-up.
Feedback Input. Regulates at the feedback voltage in adjustable mode. FB is a Dual ModeTM input that also
selects the fixed output voltage settings as follows:
Connect to GND for 3.3V operation.
7
FB
Connect to VL for 5V operation.
Connect FB to a resistor divider for adjustable mode. FB can be driven with +5V CMOS logic in order to
change the output voltage under system control.
8
CSH
Current-Sense Input, high side. Current-limit level is 100mV referred to CSL.
9
CSL
Current-Sense Input, low side. Also serves as the feedback input in fixed-output modes.
10
V+
Battery Voltage Input (4.5V to 30V). Bypass V+ to PGND close to the IC with a 0.1µF capacitor. Connects to a
linear regulator that powers VL.
5V Internal Linear-Regulator Output. VL is also the supply voltage rail for the chip. VL is switched to the out-
11
VL
put voltage via CSL (VCSL > 4.5V) for automatic bootstrapping. Bypass to GND with 4.7µF. VL can supply up
to 5mA for external loads.
12 PGND Power Ground
13
DL
Low-Side Gate-Drive Output. Normally drives the synchronous-rectifier MOSFET. Swings from 0V to VL.
14
BST
Boost Capacitor Connection for High-Side Gate Drive (0.1µF)
15
LX
Switching Node (inductor) Connection. Can swing 2V below ground without hazard.
16
DH
High-Side Gate-Drive Output. Normally drives the main buck switch. DH is a floating driver output that swings
from LX to BST, riding on the LX switching-node voltage.
Dual Mode is a trademark of Maxim Integrated Products.
_______________________________________________________________________________________ 9

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]