250Msps, 8-Bit ADC with Track/Hold
_________________________________________________Pin Description (continued)
PIN
52
53
54
55
65
66
68
72, 73
75, 76
NAME
VACTS
VACT
VARBS
VARB
TP3
TP2
TP1
AIN+
AIN-
FUNCTION
Reference Bias Resistor Center-Tap Sense (Note 12)
Reference Bias Resistor Center Tap (Note 12)
Negative Reference Voltage Sense (Note 11)
Negative Reference Voltage Input (Note 11)
Internal node. Do not connect.
Internal node. Do not connect.
Internal connection. This pin must be connected to GND.
Analog Inputs, internally terminated with 50Ω to ground. Full-scale linear input range is approximately
±270mV. Drive AIN+ and AIN- differentially for best high-frequency performance.
Note 10:
Note 11:
Note 12:
Use a multilayer board with a separate layer dedicated to ground. Connect GND and DGND in separate areas in the
ground plane (separated by at least 1/4 inch) and at only one location on the board (see Typical Operating Circuit).
Reference bias supply. Use a separate high-quality supply for these pins. Carefully bypassing these pins to achieve
noise-free operation of the reference supplies contributes directly to high ADC accuracy.
The center-tap connection of the MAX100 is normally left open. It can be driven with a bias voltage, but should be
bypassed carefully (refer to Note 11).
CLK
CLK
DCLK
DCLK
AData
BData
tpd1
tpwl
tpd2
tpwh
Figure 1. Output Timing: Divide-by-1 Mode (DIV = 0)
8 _______________________________________________________________________________________