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IDT54FCT162501ATE 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT54FCT162501ATE
IDT
Integrated Device Technology IDT
IDT54FCT162501ATE Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET
FAST CMOS 18-BIT REGISTERED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
Description
OEAB
OEBA
A-to-B Output Enable Input
B-to-A Output Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input
LEBA
B-to-A Latch Enable Input
CLKAB
A-to-B Clock Input
CLKBA
Ax
Bx
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs(1)
B-to-A Data Inputs or A-to-B 3-State Outputs(1)
NOTE:
2547 tbl 01
1. On FCT16xH501T these pins have “Bus Hold”. All other pins are standard
inputs, outputs or I/Os.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
VTERM(2) Terminal Voltage with Respect to
GND
VTERM(3) Terminal Voltage with Respect to
GND
TSTG Storage Temperature
Max.
–0.5 to +7.0
–0.5 to
VCC +0.5
–65 to +150
Unit
V
V
°C
IOUT
DC Output Current
–60 to +120 mA
NOTES:
2547 lnk 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
FUNCTION TABLE(1,4)
OEAB
L
H
H
H
H
H
H
Inputs
LEAB CLKAB
X
X
H
X
H
X
L
L
L
L
L
H
Outputs
Ax
Bx
X
Z
L
L
H
H
L
L
H
H
X
B(2)
X
B(3)
NOTES:
2547 tbl 02
1. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA,
LEBA, and CLKBA.
2. Output level before the indicated steady-state input conditions were
established.
3. Output level before the indicated steady-state input conditions were
established, provided that CLKAB was HIGH before LEAB went LOW.
4. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
↑ = LOW-to-HIGH Transition
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN
Input
VIN = 0V
3.5 6.0 pF
Capacitance
CI/O
I/O
VOUT = 0V 3.5 8.0 pF
Capacitance
NOTE:
2547 lnk 04
1. This parameter is measured at characterization but not tested.
5.10
3

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