HN29V1G91T-30 데이터 시트보기 (PDF) - Renesas Electronics

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HN29V1G91T-30

128M × 8-bit AG-AND Flash Memory

Renesas Electronics 

HN29V1G91T-30

Multi Bank Page Program

It is possible to program the data to any one page address in each bank simultaneously since this device

adopts 4 bank structure. The bank to be programmed the data is chosen from 1 bank to maximum 4 bank.

Address and data for next bank can be input consecutively by writing 11h command (dummy command)

after writing 80h command with column and page address, data as well as usual page program.

Program operation to several banks specified automatically are executed simultaneously by writing 10h

command (program start command) after data input to the maximum 4 bank completes.

R/B

tDBSY

tDBSY (A)

I/O

R/B

(A)

column J page N

80h CA1 CA2 RA1 RA2 DIN

(1) Bank0

DIN 11h

column K page P

80h CA1 CA2 RA1 RA2 DIN

(2) Bank1

tDBSY

DIN 11h

(B)

tPROG

column L page Q

column M page R

I/O

(B)

80h CA1 CA2 RA1 RA2 DIN DIN 11h

80h CA1 CA2 RA1 RA2 DIN

DIN 10h

71h

status

out

(3) Bank2

(4) Bank3

Bank 0

Memory array

Page N

Program (5)

Data register

column J

(1)

Bank 1

Page P

Program (5)

column K

(2)

Bank 2

Page Q

Program (5)

column L

(3)

Bank 3

Page R

Program (5)

column M

(4)

Rev.4.00, Jun.20.2004, page 17 of 89

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