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74HCT4052D,118(2017) 데이터 시트보기 (PDF) - NXP Semiconductors.

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74HCT4052D,118
(Rev.:2017)
NXP
NXP Semiconductors. NXP
74HCT4052D,118 Datasheet PDF : 28 Pages
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Nexperia
74HC4052; 74HCT4052
Dual 4-channel analog multiplexer/demultiplexer
Table 7. Static characteristics for 74HC4052
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input.
Vos is the output voltage at pins nZ or nYn, whichever is assigned as an output.
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C
VIH
HIGH-level input
voltage
VIL
LOW-level input
voltage
II
input leakage current
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VEE = 0 V; VI = VCC or GND
IS(OFF)
OFF-state leakage
current
VCC = 6.0 V
VCC = 10.0 V
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
|VSW| = VCC - VEE; see Figure 11
per channel
all channels
IS(ON)
ICC
CI
ON-state leakage
current
supply current
input capacitance
VI = VIH or VIL; |VSW| = VCC - VEE;
VCC = 10.0 V; VEE = 0 V; see Figure 12
VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC;
Vos = VCC or VEE
VCC = 6.0 V
VCC = 10.0 V
Csw
switch capacitance
independent pins nYn
common pins nZ
Min Typ[1] Max Unit
1.5 1.2
3.15 2.4
4.2 3.2
6.3 4.7
-
0.8
-
2.1
-
2.8
-
4.3
-V
-V
-V
-V
0.5 V
1.35 V
1.8 V
2.7 V
-
-
±1.0 μA
-
-
±2.0 μA
-
-
±1.0 μA
-
-
±2.0 μA
-
-
±2.0 μA
-
-
80.0 μA
-
-
160.0 μA
-
3.5
- pF
-
5
- pF
-
12
- pF
74HC_HCT4052
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 10 October 2017
© Nexperia B.V. 2017. All rights reserved.
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