EDI88128C 데이터 시트보기 (PDF) - White Electronic Designs Corporation

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EDI88128C

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

White Electronic Designs Corporation 

White Electronic Designs

EDI88128C

DATA RETENTION CHARACTERISTICS (EDI88128LP & EDI88130LP ONLY)

-55°C ≤ TA ≤ +125°C

Characteristic

Low Power Version only

Symbol

Conditions

Min

Typ

Max

Data Retention Voltage

VDD

VDD = 2.0V

2

–

–

Data Retention Quiescent Current

ICCDR

CS1# ≥ VDD -0.2V

–

–

400

Chip Disable to Data Retention Time (1)

TCDR

VIN ≥ VDD -0.2V

0

–

–

Operation Recovery Time (1)

TR

or VIN ≤ 0.2V

TAVAV*

–

–

NOTE:

1. Parameter guaranteed by design, but not tested.

* Read Cycle Time

Units

V

µA

ns

ns

FIGURE 5 – DATA RETENTION – CS1# CONTROLLED

Vcc

CS1#

Data Retention Mode

4.5V

VDD

4.5V

tCDR

tR

CS1# VDD -0.2V

DATA RETENTION, CS1# CONTROLLED

FIGURE 6 – DATA RETENTION — CS2 CONTROLLED

Data Retention Mode

Vcc

4.5V

VDD

4.5V

tCDR

tR

CS2

CS2 ≤ 0.2V

DATA RETENTION, CS2 CONTROLLED

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

April 2005

Rev. 17

6

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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