CXB1451Q 데이터 시트보기 (PDF) - Sony Semiconductor
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CXB1451Q Datasheet PDF : 13 Pages
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CXB1451Q
Application Cicuit (A)
Clock mode: 1 pixel/sftclk (1ppc)
Picture sync: H/V sync & DE
Color depth: 18bit
VCC
Differential cable
E
SW0
Select SFTCLK polarity
according to Tab. 8
0.1 to 0.4n
(3)
0.1 to 0.4n (3)
T
Connector
0.1 to 0.4n (3)
E
E
51
51
33µ
0.1 to 0.4n (3)
(1)
(1)
16V
1k
1.5k (1)
0.1µ
(2)
0.1µ
(2)
E
(1) CHIP RESISTOR (1%)
(2) CHIP CAPACITOR
(3) FORMED BY THE PRINTED CIRCUIT PATTERN
(L = 0.5 to 1.0mm/W = 0.5 to 1.0mm)
330 SW1
ON : transmit data
OFF : Idle
T
680p
0.01µ 1.5k (1) (2)
(2)
0.1µ
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
(2)
Select panel resolution
according to Tab. 5
SW2 330
SW3 330
T
E
T
0.1µ
(2)
E
T
61 TESTDT
62 PANEL1
63 PANEL0
64 CKMODE
65 CNTL3
66 CNTL2
67 CNTL1
68 VEEG
69 VCCG
70 VCCT
71 VEET
72 SFTCLK
73 HSYNC
74 VSYNC
75 VEEG
76 VCCG
77 CNTL0
78 BLU1 (5)
79 BLU1 (4)
80 VCCT
VCCT 40
GRN0 (0) 39
GRN0 (1) 38
GRN0 (2) 37
GRN0 (3) 36
GRN0 (4) 35
GRN0 (5) 34
VEEG 33
VCCG 32
VEET 31
VCCT 30
BLU0 (0) 29
BLU0 (1) 28
BLU0 (2) 27
VEEG 26
VCCG 25
BLU0 (3) 24
BLU0 (4) 23
BLU0 (5) 22
VEET 21
T
E
T
0.1µ
E
(2)
0.1µ
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
0.1µ
(2)
(2)
T
T
5 4 3 2 10
MSB
LSB
BLUE DATA
543210
MSB
LSB
GREEN DATA
5 4 32 1 0
MSB
LSB
RED DATA
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
–9–
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