BS62UV256JI 데이터 시트보기 (PDF) - Brilliance Semiconductor
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BS62UV256JI Datasheet PDF : 11 Pages
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BSI
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
AC TEST LOADS AND WAVEFORMS
2V
OUTPUT
1333 Ω
2V
OUTPUT
1333 Ω
INCLUDING
JIG AND
SCOPE
100PF
2000 Ω
INCLUDING
JIG AND
SCOPE
5PF
2000 Ω
FIGURE 1A
FIGURE 1B
OUTPUT
THEVENIN EQUIVALENT
800 Ω
1.2V
Vcc
GND
ALL INPUT PULSES
10%
→
90% 90%
←
→
FIGURE 2
10%
← 5ns
BS62UV256
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 2.0V )
READ CYCLE
JEDEC
PARAMETER
NAME
t AVAX
t AVQV
t ELQV
t GLQV
t ELQX
t GLQX
t EHQZ
t GHQZ
t AXOX
PARAMETER
NAME
t RC
t AA
t ACS
t OE
t CLZ
t OLZ
t CHZ
t OHZ
t OH
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
Output Disable to Output Address Change
BS62UV256 -15
MIN. TYP. MAX.
150 --
--
--
-- 150
--
-- 150
--
-- 100
10
--
--
10
--
--
0
--
35
0
--
30
10
--
--
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-BS62UV256
4
Revision 2.2
April 2001
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