BS616UV8010BC 데이터 시트보기 (PDF) - Brilliance Semiconductor
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BS616UV8010BC Datasheet PDF : 9 Pages
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BSI
BS616UV8010
AC TEST CONDITIONS
KEY TO SWITCHING WAVEFORMS
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
WAVEFORM
INPUTS
MUST BE
STEADY
OUTPUTS
MUST BE
STEADY
AC TEST LOADS AND WAVEFORMS
2V
OUTPUT
1333 Ω
2V
OUTPUT
1333 Ω
INCLUDING
JIG AND
SCOPE
100PF
2000 Ω
INCLUDING
JIG AND
SCOPE
5PF
2000 Ω
FIGURE 1A
FIGURE 1B
OUTPUT
THEVENIN EQUIVALENT
800 Ω
1.2V
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
ALL INPUT PULSES
Vcc
GND
10%
→
90% 90%
←
→
10%
← 5ns
FIGURE 2
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC, Vcc=2V)
READ CYCLE
JEDEC
PARAMETER
NAME
t
AVAX
t
AVQV
t
ELQV
t
ELQV
t
BA
t
GLQV
t
ELQX
t
BE
t
GLQX
t
EHQZ
tBDO
t
GHQZ
tAXOX
PARAMETER
NAME
t
RC
t
AA
t
ACS1
t
ACS2
t (1)
BA
t
OE
t
CLZ
t
BE
t
OLZ
t
CHZ
tBDO
t
OHZ
tOH
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
(CE1)
Chip Select Access Time
(CE2)
Data Byte Control Access Time
(LB,UB)
Output Enable to Output Valid
Chip Select to Output Low Z
(CE2,CE1)
Data Byte Control to Output Low Z (LB,UB)
Output Enable to Output in Low Z
Chip Deselect to Output in High Z (CE2,CE1)
Data Byte Control to Output High Z (LB,UB)
Output Disable to Output in High Z
Output Disable to Address Change
BS616UV8010-70
MIN. TYP. MAX.
70 --
--
--
-- 70
--
-- 70
--
-- 70
--
-- 35
--
-- 35
10 --
--
10 --
--
10 --
--
0
-- 35
0
-- 35
0
-- 30
10 --
--
BS616UV8010-10
MIN. TYP. MAX.
100 --
--
--
-- 100
--
-- 100
--
-- 100
--
-- 50
--
-- 50
15 --
--
15 --
--
15 --
--
0
-- 40
0
-- 40
0
-- 35
15 --
--
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE :
1. tBA is 35ns/50ns (@speed=70ns/100ns) with address toggle .
tBA is 70ns/100ns (@speed=70ns/100ns) without address toggle .
R0201-BS616UV8010
4
Revision 2.4
April 2002
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