74LVC3G04 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
일치하는 목록
74LVC3G04 Datasheet PDF : 17 Pages
| |||
Nexperia
74LVC3G04
Triple inverter
11.1. Waveform and test circuit
VI
nA input
VM
VM
GND
VOH
t PHL
tPLH
nY output
VM
VM
Fig. 7.
VOL
mna344
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
The input (nA) to output (nY) propagation delays
Table 9. Measurement points
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VM
0.5 x VCC
0.5 x VCC
1.5 V
1.5 V
0.5 x VCC
Output
VM
0.5 x VCC
0.5 x VCC
1.5 V
1.5 V
0.5 x VCC
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
Fig. 8.
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VI
VCC
VCC
2.7 V
2.7 V
VCC
tr = tf
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
Load
CL
30 pF
30 pF
50 pF
50 pF
50 pF
RL
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
VEXT
tPLH, tPHL
open
open
open
open
open
74LVC3G04
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 13 — 2 November 2018
© Nexperia B.V. 2018. All rights reserved
7 / 17
Share Link: 