74LVC3G04DP(2007) 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LVC3G04DP
(Rev.:2007)

Triple inverter

NXP Semiconductors. 

NXP Semiconductors

6. Pinning information

6.1 Pinning

74LVC3G04

1A 1

3Y 2

2A 3

GND 4

8 VCC

7 1Y

6 3A

5 2Y

001aad954

Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)

74LVC3G04

Triple inverter

74LVC3G04

1A 1

8 VCC

terminal 1

index area

74LVC3G04

1Y 1

7 1A

3Y 2

7 1Y

2A 3

6 3A

GND 4

5 2Y

001aad955

Transparent top view

Fig 5. Pin configuration SOT833-1 (XSON8)

3A 2

6 3Y

2Y 3

5 2A

001aad956

Transparent top view

Fig 6. Pin configuration SOT902-1 (XQFN8)

6.2 Pin description

Table 3. Pin description

Symbol (n = 1, 2, 3)

nA

nY

GND

VCC

Pin

SOT505-2, SOT765-1 and

SOT833-1

1, 3, 6

7, 5, 2

4

8

SOT902-1

7, 5, 2

1, 3, 6

4

8

Description

data input

data output

ground (0 V)

supply voltage

74LVC3G04_5

Product data sheet

Rev. 05 — 5 October 2007

© NXP B.V. 2007. All rights reserved.

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