74HCT594DB 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HCT594DB Datasheet PDF : 26 Pages
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NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
7. Functional description
Table 3. Function table[1]
Function
Clear shift register
Clear storage register
Load DS into shift register stage 0, advance previous stage data to the next stage
Transfer shift register data to storage register and outputs Qn
Shift register one count pulse ahead of storage register
Input
SHR STR
L
X
X
L
HX
X
H
HH
SHCP STCP
X
X
X
X
↑
X
X
↑
↑
↑
DS
X
X
H or L
X
X
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH transition;
X = don’t care.
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
IIK
input clamping current
VI < −0.5 V or VI > VCC + 0.5 V
IOK
output clamping current
VO < −0.5 V or VO > VCC + 0.5 V
IO
output current
VO = −0.5 V to VCC + 0.5 V
Serial data output Q7S
−0.5
+7.0
V
[1] -
±20
mA
[1] -
±20
mA
-
±25
mA
Parallel data output
-
±35
mA
ICC
supply current
Serial data output Q7S
-
50
mA
Parallel data output
-
70
mA
IGND
ground current
Serial data output Q7S
Parallel data output
-
−50
mA
-
−70
mA
Tstg
storage temperature
Ptot
total power dissipation
Tamb = −40 °C to +125 °C
−65
[2] -
+150
°C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly with 12 mW/K.
For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.
For SSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
74HC_HCT594_3
Product data sheet
Rev. 03 — 20 December 2006
© NXP B.V. 2006. All rights reserved.
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