TAPE DRIVE REGISTER (TDR)
Address 3F3 READ/WRITE
This register is included for 82077 software
compatability. The robust digital data separator
used in the FDC37C78 does not require its
characteristics modified for tape support. The
contents of this register are not used internal to the
device. The TDR is unaffected by a software
reset. Bits 2-7 are tri-stated when read in this
mode.
Table 4- Tape Select Bits
DRIVE
TAPE SEL1 TAPE SEL2 SELECTED
0
0
None
0
1
1
1
0
2
1
1
3
Table 5 - Internal 4 Drive Decode - Normal
DIGITAL OUTPUT REGISTER
DRIVE SELECT OUTPUTS
(ACTIVE LOW)
MOTOR ON OUTPUTS
(ACTIVE LOW)
Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0 nDS3 nDS2 nDS1 nDS0 nMTR3 nMTR2 nMTR1 nMTR0
X
X
X
1
0
0
1
1
1
0 nBIT 7 nBIT 6 nBIT 5 nBIT 4
X
X
1
X
0
1
1
1
0
1 nBIT 7 nBIT 6 nBIT 5 nBIT 4
X
1
X
X
1
0
1
0
1
1 nBIT 7 nBIT 6 nBIT 5 nBIT 4
1
X
X
X
1
1
0
1
1
1 nBIT 7 nBIT 6 nBIT 5 nBIT 4
0
0
0
0
X
X
1
1
1
1 nBIT 7 nBIT 6 nBIT 5 nBIT 4
Table 6 - Internal 4 Drive Decode - Drives 0 and 1 Swapped
DIGITAL OUTPUT REGISTER
DRIVE SELECT OUTPUTS
(ACTIVE LOW)
MOTOR ON OUTPUTS
(ACTIVE LOW)
Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0 nDS3 nDS2 nDS1 nDS0 nMTR3 nMTR2 nMTR1 nMTR0
X
X
X
1
0
0
1
1
0
1
nBIT 7 nBIT 6 nBIT 4 nBIT 5
X
X
1
X
0
1
1
1
1
0
nBIT 7 nBIT 6 nBIT 4 nBIT 5
X
1
X
X
1
0
1
0
1
1
nBIT 7 nBIT 6 nBIT 4 nBIT 5
1
X
X
X
1
1
0
1
1
1
nBIT 7 nBIT 6 nBIT 4 nBIT 5
0
0
0
0
X
X
1
1
1
1
nBIT 7 nBIT 6 nBIT 4 nBIT 5
13