FS61850-01 데이터 시트보기 (PDF) - AMI Semiconductor
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FS61850-01 Datasheet PDF : 10 Pages
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FS61850-01
1:10 HSTL SMBus Zero-Delay Clock Buffer IC
Advance Information
AMERICAN MICROSYSTEMS, INC.
November 2000
4.3 Register Programming
A logic-one written to a valid bit location enables (turns
on) the assigned output clock. Likewise, a logic-zero
written to a valid bit location disables (turns off) the as-
signed output clock.
Any unused or reserved register bits should be cleared to
zero. Serial bits are written to this device starting with
Byte 0 and proceeding higher. Bit 7 of each byte is writ-
ten first, and bits are written to in descending order down
to Bit 0.
Table 4: Byte 0 Register
BIT
DESCRIPTION
YP0 / YN0 Control
7
0 = Outputs Tristated
6 YP1 / YN1 Control
0 = Outputs Tristated
5 YP2 / YN2 Control
0 = Outputs Tristated
4 YP3 / YN3 Control
0 = Outputs Tristated
YP4 / YN4 Control
3
0 = Outputs Tristated
YP5 / YN5 Control
2
0 = Outputs Tristated
YP6 / YN6 Control
1
0 = Outputs Tristated
YP7 / YN7 Control
0
0 = Outputs Tristated
Shaded areas indicate default settings
1 = Outputs Enabled
1 = Outputs Enabled
1 = Outputs Enabled
1 = Outputs Enabled
1 = Outputs Enabled
1 = Outputs Enabled
1 = Outputs Enabled
1 = Outputs Enabled
PIN RW
3, 2 RW
5, 6 RW
10,
9
RW
20,
19
RW
22,
23
RW
46,
47
RW
44,
43
RW
39,
40
RW
Table 5: Byte 1 Register
BIT
DESCRIPTION
YP8 / YN8 Control
7
0 = Outputs Tristated
1 = Outputs Enabled
6 YP9 / YN9 Control
0 = Outputs Tristated
1 = Outputs Enabled
5 Reserved: Always write this bit to 0
0 = Default
4 Reserved: Always write this bit to 0
0 = Default
3 Reserved: Always write this bit to 0
0 = Default
2 Reserved: Always write this bit to 0
0 = Default
1 Reserved: Always write this bit to 0
0 = Default
Reserved: Always write this bit to 0
0
0 = Default
Shaded areas indicate default settings
PIN RW
29,
30
RW
27,
26
RW
-
R
-
R
-
R
-
R
-
R
-
R
ISO9001
QS9000
4
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