ISL6219ACAZ-T 데이터 시트보기 (PDF) - Intersil
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ISL6219ACAZ-T Datasheet PDF : 17 Pages
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ISL6219A
TABLE 1. VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0 VDAC
1
1
1
1
1
Off
1
1
1
1
0
1.100
1
1
1
0
1
1.125
1
1
1
0
0
1.150
1
1
0
1
1
1.175
1
1
0
1
0
1.200
1
1
0
0
1
1.225
1
1
0
0
0
1.250
1
0
1
1
1
1.275
1
0
1
1
0
1.300
1
0
1
0
1
1.325
1
0
1
0
0
1.350
1
0
0
1
1
1.375
1
0
0
1
0
1.400
1
0
0
0
1
1.425
1
0
0
0
0
1.450
0
1
1
1
1
1.475
0
1
1
1
0
1.500
0
1
1
0
1
1.525
0
1
1
0
0
1.550
0
1
0
1
1
1.575
0
1
0
1
0
1.600
0
1
0
0
1
1.625
0
1
0
0
0
1.650
0
0
1
1
1
1.675
0
0
1
1
0
1.700
0
0
1
0
1
1.725
0
0
1
0
0
1.750
0
0
0
1
1
1.775
0
0
0
1
0
1.800
0
0
0
0
1
1.825
0
0
0
0
0
1.850
OVERVOLTAGE PROTECTION
If the ISL6219A detects output voltages above 115% of VID,
the controller will immediately commands all PWM outputs
low. This directs the Intersil drivers to turn on the lower
MOSFETs and protect the load by preventing any further
increase in output voltage. Once the output voltage falls to
the level set by the VID code, the PWM outputs enter high-
impedance mode. The Intersil drivers respond by turning off
both upper and lower MOSFETs. If the overvoltage condition
reoccurs, the ISL6219A will again command the lower
MOSFETs to turn on. The ISL6219A will continue to protect
the load in this fashion as long as the overvoltage repeats.
After detecting an overvoltage condition, the ISL6219A
terminates normal PWM operation until it is reset by one of
two methods. Either by pulling VCC below the POR falling
threshold and restoring it above the POR rising threshold or
cycling FS/EN.
Under-Voltage
The VSEN pin also detects when the CORE voltage drops
below the VID programmed under-voltage falling threshold.
This causes PGOOD to go low, but has no other effect on
operation and is not latched.
LOAD-LINE REGULATION
In applications with high transient current slew rates, the
lowest-cost solution for maintaining regulation often requires
some kind of controlled output impedance. A current
proportional to the average current of all active channels is
steered into the inverting input of the error amplifier. There is
no DC return path connected to the FB pin except for the
feedback resistor, RFB. Therefore, the average current,
IAVG, produces a voltage drop across the feedback resistor,
RFB, proportional to the output current. In Figure 7, the
steady-state value of VDROOP is simply
VDROOP = IAVG RFB
(EQ. 3)
In the case that each channel uses the same value for RISEN to
sense channel current, a more complete expression for
VDROOP can be determined from the expression for IAVG as it
is derived from Figures 4 and 5.
IAVG
=
-I-O-----U----T--
N
r---D----S----(--O----N-----)
RISEN
VDROOP
=
-I-O-----U----T--
N
r---D----S----(--O----N-----)
RISEN
RFB
(EQ. 4)
ENABLE AND DISABLE
Three separate input conditions must be met before the
ISL6219A is released from shut-down mode. The PWM
outputs are held in a high-impedance state to assure the
drivers remain off during shut-down.
The internal power-on reset circuit (POR) prevents the
ISL6219A from starting before the bias voltage at VCC
reaches the POR-rising threshold as defined in Electrical
Specifications. The rising threshold is high enough to
guarantee that all parts of the ISL6219A can perform their
functions properly. There is enough hysteresis in the POR-
falling threshold to prevent nuisance tripping.
10
FN9093.1
March 20, 2007
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