PCA9557D,112 데이터 시트보기 (PDF) - NXP Semiconductors.
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PCA9557D,112 Datasheet PDF : 26 Pages
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NXP Semiconductors
9. Application design-in information
PCA9557
8-bit I2C-bus and SMBus I/O port with reset
VDD (5 V)
VDD
MASTER
CONTROLLER
SCL
SDA
RESET
VSS
1.8 kΩ 1.8 kΩ 2 kΩ 2 kΩ
620 Ω
VDD
PCA9557
SCL
IO0
SDA
IO1
IO2
RESET
IO3
IO4
IO5
IO6
IO7
A2
A1
A0
VSS
100 kΩ
(× 5)
SUBSYSTEM 1
(e.g., temp. sensor)
INT
RESET
SUBSYSTEM 2
(e.g., counter)
A
enable
controlled switch
(e.g., CBT device)
B
ALARM
SUBSYSTEM 3
(e.g., alarm system)
Device address configured as 0011 100x for this example.
IO0, IO2, IO3 configured as outputs.
IO1, IO4, IO5 configured as inputs.
IO6, IO7 are not used.
Fig 18. Typical application
VDD
002aad285
9.1 Minimizing IDD when the I/Os are used to control LEDs
When the I/Os are used to control LEDs, they are normally connected to VDD through a
resistor as shown in Figure 18. Since the LED acts as a diode, when the LED is off the
I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes
lower than VDD.
Designs needing to minimize current consumption, such as battery power applications,
should consider maintaining the I/O pins greater than or equal to VDD when the LED is off.
Figure 19 shows a high value resistor in parallel with the LED. Figure 20 shows VDD less
than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VI
at or above VDD and prevents additional supply current consumption when the LED is off.
PCA9557
Product data sheet
Rev. 06 — 11 June 2008
© NXP B.V. 2008. All rights reserved.
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