AD9260EB 데이터 시트보기 (PDF) - Analog Devices

부품명

상세내역

일치하는 목록

AD9260EB

High Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate

Analog Devices 

AD9260

INPUT CLOCK

RESET

DAV

tRES-DAV

tCLK-DAV

Figure 9. RESET Timing Diagram

SWITCHING SPECIFICATIONS

AVDD = +5 V, DVDD = +5 V, CL = 20 pF, TMIN to TMAX unless otherwise noted.

Table 9.

Parameters

Clock Period

Data Available (DAV) Period

Data Invalid

Data Set-Up Time

Clock Pulse-Width High

Clock Pulse-Width Low

Data Hold Time

RESET to DAV Delay

CLOCK to DAV Delay

Three-State Output Disable Time

Three-State Output Enable Time

Symbol

tC

tDAV

tDI

tDS

tCH

tCL

tH

tRES–DAV

tCLK–DAV

tOD

tOE

AD9260

50

tC ×Mode

40% tDAV

tDAV –tH –tDI

22.5

22.5

3.5

10

15

8

45

Unit

ns min

ns min

ns max

ns min

ns min

ns min

ns min

ns typ

ns typ

ns typ

ns typ

Rev. C | Page 10 of 44

Share Link: