NC7SP57(2003) 데이터 시트보기 (PDF) - Fairchild Semiconductor
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NC7SP57 Datasheet PDF : 11 Pages
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Function Selection Table
2-Input Logic Function
2-Input AND
2-Input AND with inverted input
2-Input AND with both inputs inverted
2-Input NAND
2-Input NAND with inverted input
2-Input NAND with both inputs inverted
2-Input OR
2-Input OR with inverted input
2-Input OR with both inputs inverted
2-Input NOR
2-Input NOR with inverted input
2-Input NOR with both inputs inverted
2-Input XOR
2-Input XNOR
Device
Selection
NC7SP57
NC7SP58
NC7SP57
NC7SP58
NC7SP57
NC7SP58
NC7SP58
NC7SP57
NC7SP58
NC7SP57
NC7SP58
NC7SP57
NC7SP58
NC7SP57
Connection
Configuration
Figure 1
Figures 7, 8
Figure 4
Figure 6
Figures 2, 3
Figure 9
Figure 9
Figures 2, 3
Figure 6
Figure 4
Figures 7, 8
Figure 1
Figure 10
Figure 5
Logic Configurations NC7SP57
Figure 1 through Figure 5 show the logical functions that can be implemented using the NC7SP57. The diagrams show the
DeMorgan’s equivalent logic duals for a given 2-input function. Next to the logical implementation is the board level physical
implementation of how the pins of the function should be connected.
FIGURE 1. 2-Input AND Gate
FIGURE 2. 2-Input NAND with Inverted A Input
FIGURE 3. 2-Input NAND with Inverted B Input
FIGURE 4. 2-Input NOR Gate
FIGURE 5. 2-Input XNOR Gate
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