SL4020BN 데이터 시트보기 (PDF) - System Logic Semiconductor
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SL4020BN
System Logic Semiconductor
SL4020BN Datasheet PDF : 6 Pages
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SL4020B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Symbol
Parameter
VCC
Guaranteed Limit
V ≥-55°C 25°C ≤125°C
fmax Maximum Clock Frequency(Figure 1)
5.0 3.5
10
8
15
12
3.5
1.75
8
4
12
6
tPLH, tPHL Maximum Propagation Delay, Clock to Q1
(Figure 1)
5.0 360
360
720
10
160
160
320
15
130
130
260
tPLH, tPHL Maximum Propagation Delay, Qn to Qn+1 (Figure 5.0
330
330
660
3)
10
80
80
160
15
60
60
120
tPHL Maximum Propagation Delay, Reset to Any Q
5.0 280
280
560
(Figure 2)
10
120
120
240
15
100
100
200
tTLH, tTHL Maximum Output Transition Time, Any Output 5.0
200
200
400
(Figure 1)
10
100
100
200
15
80
80
160
CIN
Maximum Input Capacitance
-
7.5
Unit
MHz
ns
ns
ns
ns
pF
TIMING REQUIREMENTS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Symbol
Parameter
tw
Minimum Pulse Width, Clock (Figure 1)
tw
Minimum Pulse Width, Reset (Figure 2)
trem Minimum Removal Time, Reset(Figure 2)
tr, tf Maximum Input Rise and Fall Times, Clock
(Figure 1)
VCC
Guaranteed Limit
V ≥-55°C 25°C ≤125°C Unit
5.0 140
140
280
ns
10
60
60
120
15
40
40
80
5.0 200
200
400
ns
10
80
80
160
15
60
60
120
5.0 350
350
700
ns
10
150
150
300
15
100
100
200
5.0
µs
10
Unlimited
15
SLS System Logic
Semiconductor
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