TEA2164 데이터 시트보기 (PDF) - STMicroelectronics

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TEA2164

SWITCH MODE POWER SUPPLY PRIMARY CIRCUIT

STMicroelectronics 

Operation after synchronization

TEA2164

(1) NORMAL OPERATION

∆T : synchronization window

Operation after synchronization

(2) NEGATIVE PULSE MISSING

Transistor turn-off is ensured by VCM1 current limi tation cross-

ing or by an internal tON (max.) limitation set by a 2.5V threshold

(3) ERRATIC POSITIVE PULSES

P1 and P2 are masked due to the synchronization window

Cases (2) (3) (4) do not occur in normal operating.

IV - MAXIMUM DUTY CYCLE LIMITATION

Burst mode : The maximum duty cycle is controlled

by the voltage on Pin 9 (Figure 13).

Synchronized mode : Normally the maximum duty

cycle is set by the master circuit. Oowever the

maximum conducting time will never exceed the

value given by the comparison of the oscillator

wave-form with the 2.5V internal threshold.

V - OUTPUT STAGE

TEA2164 output stage has been designed to drive

switching bipolar transistor.

- Each base drive begins with a positive pulse IBON

(4) Fsynchro < 0.65 Fo

Signal S1 triggers burst oscillator capacitor discharge.

The TEA2164 restarts in burst-mode

that realizes an efficient transistor turn-on.

- After the starting pulse IBON, the base current is

proportional to the collector current. The current

gain is easily fixed by a resistor R (Figure 14).

- A fast and safe transistor turn-off is realized by a

fast positive base current cut-off and by applying

a negative base drive which draws stored carri-

ers. A typical 0.7s delay prevents from cross-con-

duction of positive and negative output stages.

Remark : In order to reduce power dissipation on

the positive output stage with the low gain transis-

tors, for high base currents the positive output stage

operates in saturated mode (Figure 15). This can

be achieved by using a resistor between VCC and

V+.

11/15

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