PI6C133-03 데이터 시트보기 (PDF) - Pericom Semiconductor
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PI6C133-03 Datasheet PDF : 15 Pages
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133 MHz Clock Generation
for Pentium II/III Processors
Features
Four copies of CPU Clock @ 133/100 MHz
Eight copies of PCI Clock (Synchronous w/CPU Clock)
including one free running PCI clock.
Two copies of fixed frequencies 3.3V Clock @ 66 MHz
Three copies of APIC Clock @ 16.667 MHz,
synchronous to CPU Clock
One copy of 48 MHz Clock
Two copies of Ref. Clock @ 14.13818 MHz
Ref.14.31818 MHz Xtal Oscillator Input
CPU Clock Frequency selection pin for selecting
133 MHz or 100 MHz operation
Power Management Control Input Pins
Supports Reliance (RCC) chip set
Spread Spectrum enable/disable pin
56-pin SSOP (V) package
Description
The PI6C133, a low-skew, low-jitter 133 MHz clock generator,
is specifically designed to meet all the clocking requirements for
133 MHz and 100 MHz desktops with high-performance and
lower-power features.
Split power supplies of 2.5V and 3.3V are used to reduce power
consumption, minimize noise and to ensure CPU independence.
The 2.5V supply is used to power CPUCLK clocks to the processor
module. 2.5V signalling is compliant to JEDEC standard 8-X. The
rest of the circuitry is powered by a 3.3V supply.
Key features, such as power-management and spread-spectrum
functions, are fully supported. PWRDWN# signal will turn off all
internal circuits and keep all outputs to a low state, making the
power consumption less than 100µA. For less stringent power
requirements, CPUSTOP# will turn off CPUCLK and 3V66 outputs
instantaneously. Spread spectrum function can be optionally disabled
by pulling SPREAD# pin to a HIGH state.
Pin Configuration
Block Diagram
VSS 1
REF0 2
REF1 3
VDD3V 4
XTAL_IN 5
XTAL_OUT 6
VSS 7
PCICLK_F 8
PCICLK1 9
VDD3V 10
PCICLK2 11
PCICLK3 12
VSS 13
PCICLK4 14
PCICLK5 15
VDD3V 16
PCICLK6 17
PCICLK7 18
VSS 19
VSS 20
3V66_0 21
3V66_1 22
VDD3V 23
VSS 24
NC 25
NC 26
VDD3V 27
SEL133/100# 28
56-Pin
V
56 VDD2V
55 APIC2
54 APIC1
53 APIC0
52 VSS
51 VDD2V
50 NC
49 NC
48 VSS
47 VDD2V
2.5V
Supply
46 CPUCLK3
45 CPUCLK2
44 VSS
43 VDD2V
42 CPUCLK1
41 CPUCLK0
40 VSS
39 VDD3V
38 VSS
37 PCISTOP#
36 CPUSTOP#
35 PWRDWN#
34 SPREAD#
33 SEL1
32 SEL0
31 VDD3V
30 48MHz
29 VSS
XTAL_IN
REF
XTAL_OUT
OSC
SEL0,1
SPREAD#
SEL100/33#
PLL1
CPUSTOP#
Div
PCISTOP#
PWRDWN#
Div
PLL2
2 REF[0:1]
3 APIC[0:2]
4 CPUCLK[0:3]
7 PCICLK[1:7]
PCICLK_F
2 3V66MHz
48MHz
350
PS8415
07/23/99
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