MAX748AC/D 데이터 시트보기 (PDF) - Maxim Integrated
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MAX748AC/D Datasheet PDF : 12 Pages
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3.3V, Step-Down,
Current-Mode PWM DC-DC Converters
INPUT
MAX748A 3.3V TO 16.0V
MAX763A 3.3V TO 11.0V
VIN
8
1
V+
SHDN
7
LX
MAX748A
MAX763A OUT 5
3
SS
4
CC
C1
0.047µF
GND
REF
6
2
C6
1000pF
C2
1.0µF
C3*
150µF
(16V)
D1
1N5817
L1
22µH
C5
330pF
OUTPUT
3.3V
C4*
220µF
(10V)
*OS-CON Series (very low ESR)
Figure 4. Standard 3.3V Step-Down Application Circuit Using
Through-Hole Components (all temperature ranges)
INPUT
MAX748A 3.3V TO 16.0V
MAX763A 3.3V TO 11.0V
VIN
8
1
V+
SHDN
7
LX
MAX748A
MAX763A OUT 5
3
SS
4
CC
C1
0.047µF
GND
REF
6
2
C6
1000pF
C2
1.0µF
C3*
68µF
(16V)
D1
1N5817
L1
22µH
C5
330pF
OUTPUT
3.3V
C4*
100µF
(6.3V)
*Sprague 293D or 595D Series-16V. See Table 3
for alternative suppliers.
Figure 5. Standard 3.3V Step-Down Application Circuit Using
Surface-Mount Components (Commercial and Extended
Industrial Temperature Ranges)
The capacitor’s ESR should be less than 0.25Ω to keep
the output ripple less than 50mVp-p over the entire cur-
rent range (using a 22µH inductor). Capacitor ESR
usually rises at low temperatures, but OS-CON capaci-
tors provide very low ESR below 0°C. Table 3 lists
capacitor suppliers.
Other Components
The catch diode should be a Schottky or high-speed
silicon rectifier with a peak current rating of at least
1.0A for full-load (500mA) operation. The 1N5817 is a
good choice. The 330pF outer-loop compensation
capacitor provides the widest input voltage range and
best transient characteristics.
Printed Circuit Layouts
A good layout is essential for stable, low-noise opera-
tion. The layouts and component placement diagrams
in Figures 6-9 have been tested successfully over a
wide range of operating conditions. The 1µF input
bypass capacitor must be positioned as close to
the V+ and GND pins as possible. Also, place the
output capacitor as close to the OUT and GND pins as
possible. The traces connecting ground to the input
and output filter capacitors and to the catch diode
must be short to reduce inductance. Use an uninter-
rupted ground plane if possible.
Output-Ripple Filtering
A simple lowpass pi-filter (Figure 3) can be added to
the output to reduce output ripple to about 5mVp-p.
The cutoff frequency shown is 21kHz. Since the filter
inductor is in series with the circuit output, minimize the
filter inductor’s resistance so the voltage drop across it
is not excessive.
10 ______________________________________________________________________________________
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