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CH1787ET(1998) 데이터 시트보기 (PDF) - Cermetek Microelectronics

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CH1787ET
(Rev.:1998)
Cermetek
Cermetek Microelectronics Cermetek
CH1787ET Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Table 1. CH1787 Pin Descriptions
PIN
1
2
7
8
NAME
RING
TIP
RXA
____
DTR
9
___
ANS
10
__
V/D
11
RST1
12
__
RI
13
N/C
14
___
DSR
15
____
ORA
16
____
TXD
17
DIR
18
IRQ
19
_____
SLEEP
I/O
FUNCTION
I/O
Directly connects to the telephone line's Ring lead through a user supplied RJ-11C jack.
I/O
Directly connects to the telephone line's Tip lead through a user supplied RJ-11C jack.
O
ANALOG VOICE INJECTED. Transit and receive signal. Let float if not used.
I
DATA TERMINAL READY input. ActiveLOW. Switching off DTR can either return modem to command
state, disconnect phone call, or reset modem. DTR should be set LOW when not used.
Answer input has two modes of operation depending on its state during reset. 1. When ANS is low
during reset the CH1787 will go off hook in the answer mode, sending answer tone continuously
waiting for an originating tone. This mode of operation is used on a dedicated non dial-up telephone
I
line (leased line). 2. When ANS is high during reset, the modem will initiate an answer tone whenever
ANS Pin goes low during normal operations. The modem will send the answer tone for 30 seconds
and then stop. If ANS is still low at the completion of the 30 seconds, the modem will attempt another
answer tone sequence as long as ANS is low. Used to manually answer an incoming call.
VOICE/DATA output is used to switch between telephone and modem line use. When low the modem
O
is in the control mode and a voice circuit can be switched out, RXA, TXA when high the modem is in
the data mode and the input should be RXD/TXD.
RESET input (active high). This input must be asserted HIGH for at least 10 ms to reset the modem.
I
RESET is then returned LOW for normal operation. If no system reset is available, let this pin float to
enable internal reset.
O
RING INDICATION: This signal follows the frequency of the ringing signal normally about 20 to 40 Hz
for 2 seconds off for for 4 seconds.
-
No Connection.
O
DATA SET READY output. LOW indicates handshaking with a remote modem is in progress, and/ or
the data carrier of a remote modem is detected.
ORA is an input that is active low. When LOW it will dial one of two stored telephone numbers
depending on the state of the TST pin. The numbers are stored in NVRAM. One is a user defined
number that is loaded in by the user one time with the AT&ZO=(phone number) command. The other
number is a prestored number that is located at Cermetek(408____________) and is in a permanent
I
loop back answering on the second ring. CH1787 will attempt to connect with the stored number up to
15 tries at 60 second intervals to obtain a successful connection as long as ORA is low. The state of
DCD indicating carrier designates a successful connection. If ORA goes high, further attempts to
connect will be terminated. If after disconnecting from a valid connection, ORA still low the modem will
be unresponsive until ORA is placed high then low. The FCC requireds that automatic dialing attempts
do not exceed 15 to the same number. TST low dial the user stored number.
I
TRANSMIT DATA. Serial receive data input. Marking, or a binary 1 condition is transmitted when a
HIGH is asserted.
DIR is an output that indicates when TXD data may be sent to the modem and when RXD data is
valid from the modem. The user should monitor this pin or gate it as shown in Figure 4 to prevent data
O
from being erronously interpreted by the user's host processer. DIR tells when the TXD and RXD lines
are used for internal CH1787 connection. When DIR is high, valid data is on RXD and TXD. When
DIR is low the user may ignore RXD data and should not place any data on TXD since it will be
ignored by the CH1787.
-
4.7KW resistor to 5V
SLEEP output. A LOW indicates modem is in low power idle mode. Used to control power to other
devices. See Figure 5. Register S24 is the sleep timer register. When the modem is inactive for a
O
period of time specified by S24, the CH1787 will periodically power down by about 50% of its normal
operating power. I/O lines will become undefined. The default for the CH1787 is that sleep mode is
inhibited. This is done by loading 255 into S24.
Note: (1) If VCC has a slow power up ramp time, the internal reset may be ineffective.
Cermetek Microelectronics, Inc.
Document No. 603-0182 Rev. D (11/98) 4

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