CDB4227 데이터 시트보기 (PDF) - Cirrus Logic
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CDB4227 Datasheet PDF : 36 Pages
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CS4227
SWITCHING CHARACTERISTICS - CONTROL PORT (TA = 25 °C; VA+, VD+ = +5 V ±5%;
Inputs: logic 0 = DGND, logic 1 = VD+; CL = 30 pF)
Parameter
Symbol
Min
Max
Unit
SPI Mode (SPI/I2C = 0)
CCLK Clock Frequency
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCL Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
fsck
-
tcsh
1.0
tcss
20
tscl
66
tsch
66
tdsu
40
(Note 15)
tdh
15
tpd
-
tr1
-
tf1
-
(Note 16)
tr2
-
(Note 16)
tf2
-
6
MHz
-
µs
-
ns
-
ns
-
ns
-
ns
-
ns
45
ns
25
ns
25
ns
100
ns
100
ns
Notes: 15. Data must be held for sufficient time to bridge the transition time of CCLK.
16. For FSCK < 1 MHz.
CS
t css
t scl t sch
t csh
CCLK
t r2
t f2
CDIN
CDOUT
t dsu t dh t pd
Figure 3. Control Port SPI Mode
8
DS281PP2
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