M41T00(2015) 데이터 시트보기 (PDF) - STMicroelectronics

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M41T00
(Rev.:2015)

Serial real-time clock

STMicroelectronics 

M41T00

CLOCK

Device operation

Figure 4. Serial bus data transfer sequence

DATA LINE

STABLE

DATA VALID

DATA

START

CONDITION

CHANGE OF

DATA ALLOWED

STOP

CONDITION

AI00587

Figure 5. Acknowledge sequences

START

SCLK FROM

MASTER

1

2

DATA OUTPUT

BY TRANSMITTER

MSB

DATA OUTPUT

BY RECEIVER

CLOCK PULSE FOR

ACKNOWLEDGEMENT

8

9

LSB

AI00601

Figure 6. Bus timing requirements sequence

SDA

tBUF

SCL

P

tHD:STA

tR

tF

tHIGH

S

tLOW

tSU:DAT

tHD:DAT

tHD:STA

tSU:STA

SR

tSU:STO

P

1. P = STOP and S = START

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AI00589

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