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MXED202 데이터 시트보기 (PDF) - Clare Inc => IXYS

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MXED202
Clare
Clare Inc => IXYS Clare
MXED202 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MXED202
Analog Inputs: DRV, INV
Parameter
DRV Pin Input
Resistance
DRV Pin Input
Capacitance
Voltage Range of
DRV Input
Feedback Resistor
from VOH to INV
Input Resistor from
INV to GND
Gain Ratio
Sym
DRVRin
DRVCin
VDRV
RF
RI
RF / RI
Preliminary
Operating Condition
-
-
-
-
-
-
Min
Typ Max Units
10
-
-
k
-
-
10
pF
1.0
- VMAX-1.5 V
10
-
100
k
10
-
100
k
0.1
-
10
-
Analog Outputs: VOH, HREF, LREF, R(n)
Bypass capacitors to GND: CVOH=10µF; CHREF, CLREF =2nF
Parameter
Precharge Voltage
Precharge Ripple
Sym
VOH
VOHac
Row 0-127 Output RowON
Pulldown Resistance
Row 0-127 Output
Pullup Resistance
RowOFF
Row 0-127 Chip
Output Capacitance
CRow
Operating Condition
Iout avg= 100 µA, CLOAD=1000pF
Voltage Regulator Active,
Iout avg= 100 µA
VROW < 5V
(to enable OLED turn-on)
VROW > (VOH-2V)
(to disable OLED turn-on)
Per output
Min
Typ
Max Units
5
-
30
V
-
-
100
mV
p-p
-
-
20
-
-
300
-
-
20
pF
8
www.clare.com
Rev. 2

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