5962R9582101VXC 데이터 시트보기 (PDF) - Intersil
부품명
상세내역
일치하는 목록
5962R9582101VXC Datasheet PDF : 21 Pages
| |||
HS-82C37ARH
Burn-In Circuits (Continued)
HS-82C37ARH 42 LEAD CERAMIC FLATPACK
VDD
1
42
2
41
3
40
4
39
5
38
6
37
7
36
8
35
9
34
10
33
11
32
F0
12
31
F1
13
30
14
29
15
28
16
27
17
26
18
25
19
24
20
23
21
22
HS-82C37ARH 42 LEAD CERAMIC FLATPACK
1
F0
2
LOAD
3
LOAD
4
OPEN
5
6
7
LOAD
8
LOAD
9
LOAD 10
11
F0
12
F5
13
LOAD
14
LOAD
15
OPEN
16
F1
17
F2
18
F3
19
F4
20
21
42
LOAD
41
LOAD
40
LOAD
39
LOAD
38
37
36
35
34
33
32
31
30
29
28
27
OPEN
26
LOAD
25
LOAD
24
23
22
VDD
F5
F4
F3
F2
F1
F0
STATIC CONFIGURATION
NOTES:
15. VDD = +6.0V ±5%Part is Static Sensitive
16. TA = 125oC MinimumVoltage Must be Ramped
17. Resistors:
R1 = 10kΩ ±10% (Pins 6, 7, 11-13, 16-19)
R2 = 2.7kΩ ±5% (Pins 1, 2, 21-23, 26-30, 32-36)
F0
F1
START-UP TIMING
NOTES:
18. F0 is 50% duty cycle square wave pulse burst.
19. 1.0kHz ≤ F0 ≤ 100kHzF0 is left High after pulse burst
20. 10 cycles ≤ F0 Pulse Burst ≤ 1.0s
21. F1 = Single pulse with width equal to 2 cycles of F0
22. F1 is left Low after pulse burst
23. F1 pulse occurs after start of F0 and ends before F0.
Input levels: 0.9VDD ≤ VIH ≤ VDD, -0.3V ≤ VIL ≤ 0.7V
VDD
2.7kΩ
LOAD
2.7kΩ
DYNAMIC CONFIGURATION
NOTES:
24. VDD = 6.5V ±5% (Burn-In)
25. VDD = 6.0V ±5% (Life Test)
26. TA = 125oC Minimum
27. Part is Static Sensitive, Voltage Must be Ramped
28. Resistors:
R1 = 10kΩ ±10% (Pins 6, 7, 11-13, 16-19)
R2 = 2.7kΩ ±10% (Pins 1, 2, 21-23, 26-30, 32-36, and LOADS)
10
Share Link: 