CD4096BMSFN3331 데이터 시트보기 (PDF) - Intersil

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CD4096BMSFN3331

CMOS Gated J-K Master-Slave Flip-Flops

Intersil 

CD4095BMS, CD4096BMS

Typical Performance Characteristics

AMBIENT TEMPERATURE (TA) = +25oC

30

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

25

20

15

10V

10

5

5V

0

5

10

15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

FIGURE 7. TYPICAL OUTPUT LOW (SINK) CURRENT

CHARACTERISTICS

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

-15

-10

-5

0

0

AMBIENT TEMPERATURE (TA) = +25oC

GATE-TO-SOURCE VOLTAGE (VGS) = -5V

-5

-10

-15

-10V

-20

-25

-15V

-30

AMBIENT TEMPERATURE (TA) = +25oC

15.0

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

12.5

10.0

10V

7.5

5.0

2.5

5V

0

5

10

15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

FIGURE 8. MINIMUM OUTPUT LOW (SINK) CURRENT

CHARACTERISTICS

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

-15

-10

-5

0

0

AMBIENT TEMPERATURE (TA) = +25oC

GATE-TO-SOURCE VOLTAGE (VGS) = -5V

-5

-10V

-10

-15V

-15

FIGURE 9. TYPICAL OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

AMBIENT TEMPERATURE (TA) = +25oC

FIGURE 10. MINIMUM OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

AMBIENT TEMPERATURE (TA) = +25oC

300

SUPPLY VOLTAGE (VDD) = 5V

250

200

150

10V

100

15V

50

0

25

50

75

100

LOAD CAPACITANCE (CL) (pF)

FIGURE 11. TYPICAL PROPAGATION DELAY TIME vs LOAD

CAPACITANCE

200

SUPPLY VOLTAGE (VDD) = 5V

150

100

10V

15V

50

0

0

20

40

60

80

100

LOAD CAPACITANCE (CL) (pF)

FIGURE 12. TYPICAL TRANSITION TIME vs LOAD

CAPACITANCE

7-1102

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