CD4067BMS 데이터 시트보기 (PDF) - Intersil
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CD4067BMS Datasheet PDF : 10 Pages
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CD4067BMS, CD4097BMS
VDD 7
8
CHANNEL
IN/OUT Y
8
CHANNEL
IN/OUT X
65 4 3 2 1 0 7 6 5 432
10
24 15 16 18 19 20 21 22 23 2 3 4 5 6 7 8 9
TG
TG
TG
TG
TG
TG
* 10
A
TG
* 11
B
TG
* 14
C
TG
* 13
INHIBIT
TG
TG
TG
TG
TG
TG
TG
12
VSS
VDD
*ALL INPUTS PROTECTED BY
CMOS PROTECTION NETWORK
1
COMMON
X OUT/IN
17
COMMON
Y OUT/IN
VSS
FIGURE 4. CD4097BMS LOGIC DIAGRAM
7-8
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