PEB24902 데이터 시트보기 (PDF) - Infineon Technologies

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PEB24902

Quad ISDN Echocancellation Circuit Analog Front End for Splitterless ADSL over ISDN

Infineon Technologies 

PEB 24902

PEF 24902

External Signals

2

External Signals

Attention: Any warranty, whether express or implied shall be subject to the use of

the chips within the procedure as outlined in the respective Data Sheet.

In case the chips are used incorrectly or not used within the logic or

electrical specifications, any and all warranty or other claim based on

any defect or malfunction whatsoever shall be excluded.

2.1

Logic Symbol

Analog Line Ports

+5V

0V

VDDd1...2, a0...3

GNDd1...2, a0...3

Mode

Settings

CODE

PLLF

RES

VREF0

VREF1

VREF2

VREF3

IEC-4-AFE-X

SDX

SDR

Serial Interface

to DFE

TEST

PDM 0

PDM 1

PDM 2

PDM 3

ADC

Outputs

Serial Control Address

Interface

Boundary Scan

Pins

AFE-X_l ogi c_symbol .vsd

Figure 2 Logic Symbol IEC-4-AFE-X Version 3.2

Data Sheet

11

Rev. 1, 2004-05-28

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