BU4042B 데이터 시트보기 (PDF) - ROHM Semiconductor

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BU4042B

Quad D latch

ROHM Semiconductor 

Standard ICs

Quad D latch

BU4042B

The BU4042B is a four-circuit D latch with a common clock line and separate data input terminals.

When the polarity input is set to “H”, input (D) is presented to output (Q) as is, as long as the clock input is rising, and

when the clock input falls, output (Q) holds input (D) at that point. While the clock input is falling, output (Q) does not

change even if input (D) changes.

Also, if the polarity input is set to “L”, input (D) is presented to output (Q) as is, as long as the clock input is at “L”

level, and when the clock input goes to “H” level, latching takes place.

•Features

1) Low power dissipation.

2) Wide range of operating power supply voltages.

3) High input impedance.

•Block diagram

4) High fan-out.

5) Direct drive of 2 L-TTL inputs and 1LS-TTL input.

•Logic circuit diagram

Q4 1

Q1 2

Q1 3

D1 4

CLOCK 5

POLARITY 6

D2 7

VSS 8

CL D

QQ

CL D

QQ

CL D

QQ

CL D

QQ

16 VDD

15 Q4

14 D4

13 D3

12 Q3

11 Q3

10 Q2

9 Q2

D1 (4)

D2 (7)

D3 (13)

D4 (14)

CLOCK

(5)

POLARITY

(6)

LATCH

1

LATCH

2

LATCH

3

LATCH

4

(2) Q1

(3) Q1

(10) Q2

(9) Q2

(11) Q3

(12) Q3

(1) Q4

(15) Q4

•Truth table

CLOCK

L

H

H

L

POLARITY

L

L

H

H

Q

D

LATCH

D

LATCH

1

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