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SY100E101 데이터 시트보기 (PDF) - Micrel

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SY100E101
Micrel
Micrel Micrel
SY100E101 Datasheet PDF : 4 Pages
1 2 3 4
Micrel, Inc.
QUAD 4-INPUT
OR/NOR GATE
SY10E101
SY1S0YE10100E1101
SY100E101
FEATURES
s 500ps max. propagation delay
s Extended 100E VEE range of –4.2V to –5.5V
s True and complementary outputs
s Fully compatible with industry standard 10KH,
100K I/O levels
s Internal 75Kinput pulldown resistors
s Fully compatible with Motorola MC10E/100E101
s Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E101 are quad 4-input OR/NOR gates
designed for use in new, high-performance ECL systems.
The E101 features both true and complementary outputs.
BLOCK DIAGRAM
PIN NAMES
Pin
Dna, Dnb, Dnc, Dnd
Q0-Q3
Q0-Q3
VCCO
Function
Data Inputs
True Outputs
Inverting Outputs
VCC to Output
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
1
Rev.: G Amendment: /0
Issue Date: March 2006

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