DM74LS298N 데이터 시트보기 (PDF) - Fairchild Semiconductor

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DM74LS298N

Quad 2-Port Register Multiplexer with Storage

Fairchild Semiconductor 

Switching Characteristics

at VCC = +5V and TA = +25˚C

Symbol

Parameter

tPLH

Propagation Delay Time

Low to High Level Output

CP to Qn

tPHL

Propagation Delay Time

High to Low Level Output

CP to Qn

Functional Description

This device is a high speed quad 2-port register. It selects

four bits of data from two sources (ports) under the control of

a Common Select input (S). The selected data is transferred

to the 4-bit output register synchronous with the

HIGH-to-LOW transition of the Clock input (CP). The 4-bit

output register is fully edge-triggered. The Data inputs (Inx)

and Select input (S) need be stable only one setup time prior

to the HIGH-to-LOW transition of the clock for predictable

operation.

Logic Diagram

RL = 2 kΩ, CL = 15 pF

Min

Max

25

25

Units

ns

ns

Truth Table

Inputs

Output

S

I0x

I1x

Qx

l

l

X

L

l

h

X

H

h

X

l

L

h

X

h

H

l = LOW Voltage Level one setup time prior to the HIGH-to-LOW clock tran-

sition.

h = HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock tran-

sition.

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

DS009826-3

3

www.fairchildsemi.com

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