MC74HC257 데이터 시트보기 (PDF) - Motorola => Freescale
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MC74HC257 Datasheet PDF : 6 Pages
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH,
tPHL
Parameter
Maximum Propagation Delay, Nibble A or B to Output Y
(Figures 1 and 4)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL
Maximum Propagation Delay, Select to Output Y
(Figures 2 and 4)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLZ,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 3 and 5)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 3 and 5)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Cin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Cout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ NOTES:
Maximum Input Capacitance
Maximum Three–State Output Capacitance
(Output in High–Impedance State)
MC74HC257
VCC
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
—
—
Guaranteed Limit
v v – 55 to
25_C
85_C
125_C Unit
100
125
150
ns
20
25
30
17
21
26
100
125
150
ns
20
25
30
17
21
26
150
190
225
ns
30
38
45
26
33
38
150
190
225
ns
30
38
45
26
33
38
60
75
90
ns
12
15
18
10
13
15
10
10
10
pF
15
15
15
pF
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD
Power Dissipation Capacitance (Per Package)*
39
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
PIN DESCRIPTIONS
INPUTS
A0, A1, A2, A3 (Pins 2, 5, 11, 14)
Nibble A input. The data present on these pins is trans-
ferred to the output when the Select input is at a low level and
the Output Enable input is at a low level. The data is pres-
ented to the outputs in noninverted form.
B0, B1, B2, B3 (Pins 3, 6, 10, 13)
Nibble B input. The logic data present on these pins is
transferred to the output when the Select input is at a high
level and the Output Enable input is at a low level. The data
is presented to the outputs in noninverted form.
OUTPUTS
Y0, Y1, Y2, Y3 (Pins 4, 7, 9, 12)
Nibble output. The selected nibble input is presented at
these outputs when the Output Enable input is at a low level.
For the Output Enable input at a high level, the outputs are
switched to the high impedance state.
CONTROL INPUTS
Select (Pin 1)
Nibble select. This input determines the nibble to be trans-
ferred to the outputs. A low level on this input selects the A
inputs and a high level selects the B inputs.
Output Enable (Pin 15)
Output Enable. A low level on this input allows the selected
input data to be presented at the outputs. A high level on this
input forces the outputs into the high–impedance state.
High–Speed CMOS Logic Data
3
DL129 — Rev 6
MOTOROLA
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