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HD74HC294 데이터 시트보기 (PDF) - Hitachi -> Renesas Electronics

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HD74HC294
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD74HC294 Datasheet PDF : 12 Pages
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HD74HC292/HD74HC294
Programmable Frequency Divider/Digital Timer
Description
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the
Programming inputs. It has two Clock inputs, either of which may be used as a clock inhibit. The device
also has an active-low Reset, which initializes the internal flip-flop states. Test Point outputs (TP1, TP2,
TP3) are provided with HD74HC292 to facilitate incoming inspections.
Test Point output is provided with HD74HC294 to facilitate incoming inspections.
Features
High Speed Operation: tpd (Clock to Q) = 16 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
CLR
L
H
H
H
H
CLK1
X
L
H
X
CLK2
X
L
X
H
Q Output Mode
Cleared to L
Count
Count
Inhibit
Inhibit

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