NJU6624AFG1 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6624AFG1

12-CHARACTER 1-LINE DOT MATRIX LCD CONTROLLER DRIVER with SMOOTH SCROLL FUNCTION

Japan Radio Corporation  

NJU6624A/B

gBus timing characteristics

-Serial Interface Sequence

PARAMETER

Serial clock cycle time

Serial clock width

Chip select pulse width

Chip select set up time

Chip select hold time 1

Serial input data set up time

Serial input data hold time

Key data output delay time

Data port direction change time

from input to output

Data port direction change time

from output to input

Chip select hold time 2

(VDD=4.5V to 5.5V, VLCD1=VSS+8.0V, Ta=25oC)

SYMBOL

MIN.

MAX. CONDITION UNIT

tCYCE

1

-

us

tSC

300

-

ns

PWCS

100

-

us

tCSU

300

-

fig.1 ns

tCH1

300

-

ns

tSISU

300

-

ns

tSIH

300

-

ns

tKDD

-

300

ns

tSRWD

tCRWD

-

300

ns

fig.2

-

300

ns

tCH2

1

-

us

tCSU

CS

SCL

tCYCE

tSC

tSISU

tSIH

tSC

PWCS

tCH

DATA

Input data sequence

CS

tC H2

8

SCL

DATA

Input

9

10

tKDD

Output

Output

15

Output

DATA I/O

change timing

tSRWD

Input data sequence

16

Output

tCRWD

Input

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