HC4046 데이터 시트보기 (PDF) - System Logic Semiconductor

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HC4046

Phase-locked loop. High-performance silicon-gate CMOS.

System Logic Semiconductor 

SL74HC4046

[Demodulator Section]

DC ELECTRICAL CHARACTERISTICS

Symbol

Parameter

Test Conditions

RS Resistor Range

At RS > 300 kΩ

the Leakage

Current can

Influence

VDEMOUT

VOFF Offset Voltage VCOIN VI = VVCOIN = 1/2

to VDEMOUT

VCC; Values taken

over RS Range

RD Dynamic Output

VDEMOUT =

Resistance at DEMOUT 1/2 VCC

VCC

Guaranteed Limit

V 25 °C to

-55°C

≤85°C

≤125°C Unit

Min Max Min Max Min Max

3.0 50 300

kΩ

4.5 50 300

6.0 50 300

3.0

See Figure 10

mV

4.5

6.0

3.0

Typical 25 Ω

Ω

4.5

6.0

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

Figure 3. Switching Waveforms

Figure 4. Test Circuit

SLS

System Logic

Semiconductor

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