74VHC574(2005) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74VHC574
(Rev.:2005)

Octal D-Type Flip-Flop with 3-STATE Outputs

Fairchild Semiconductor 

March 1993

Revised May 2005

74VHC574

Octal D-Type Flip-Flop with 3-STATE Outputs

General Description

The VHC574 is an advanced high speed CMOS octal flip-

flop with 3-STATE output fabricated with silicon gate CMOS

technology. It achieves the high speed operation similar to

equivalent Bipolar Schottky TTL while maintaining the

CMOS low power dissipation. This 8-bit D-type flip-flop is

controlled by a clock input (CP) and an output enable input

(OE). When the OE input is HIGH, the eight outputs are in

a high impedance state.

An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two supply systems such as battery back up. This cir-

cuit prevents device destruction due to mismatched supply

and input voltages.

Features

s High Speed: tPD 5.6 ns (typ) at VCC 5V

s High Noise Immunity: VNIH VNIL 28% VCC (Min)

s Power Down Protection is provided on all inputs

s Low Noise: VOLP 0.6V (typ)

s Low Power Dissipation: ICC 4 PA (Max) @ TA 25qC

s Pin and Function Compatible with 74HC574

Ordering Code:

Order Number Package Number

Package Description

74VHC574M

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74VHC574SJ

M20D

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC574MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VHC574N

N20A

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Logic Symbol

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names

Description

D0–D7

CP

Data Inputs

Clock Pulse Input

OE

3-STATE Output Enable Input

O0–O7

3-STATE Outputs

© 2005 Fairchild Semiconductor Corporation DS011565

www.fairchildsemi.com

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