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74ABT273AN
Philips
Philips Electronics Philips
74ABT273AN Datasheet PDF : 12 Pages
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Philips Semiconductors
Octal D-type flip-flop
Product specification
74ABT273A
FEATURES
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered asynchronous Master Reset
Power-up reset
See 74ABT377 for clock enable version
See 74ABT373 for transparent latch version
See 74ABT374 for 3-State version
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
ICCH
Propagation delay
CP to Qn
Input capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs High; VCC =5.5V
TYPICAL
3.0
3.4
3.5
150
UNIT
ns
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ABT273A N
–40°C to +85°C
74ABT273A D
–40°C to +85°C
74ABT273A DB
–40°C to +85°C
74ABT273A PW
NORTH AMERICA
74ABT273A N
74ABT273A D
74ABT273A DB
7ABT273APW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
MR 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
11
CP Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
D0 - D7 Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0 - Q7 Data outputs
1
MR Master Reset input (active-Low)
10
GND Ground (0V)
20
VCC Positive supply voltage
1995 Sep 06
2
853-1774 15704

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