SL74LV374 데이터 시트보기 (PDF) - System Logic Semiconductor

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SL74LV374

OCTAL D-TIME FLIP-FLOP; POSITIVE EDGE-TRIGGER (3-StatE)

System Logic Semiconductor 

SL74LV374

DC CHARACTERISTICS

Symbol

VIH

VIL

VOH

VOL

II

IOZ

ICC

Parameter

Test

VCC,

coditions

V

25° C

Limits

-40°C to

85° C

125° C

min max min max min max

HIGH level input VO = VCC-0.1 V 1.2 0.9 - 0.9 - 0.9 -

voltage

2.0 1.4 - 1.4 - 1.4 -

3.0 2.1 - 2.1 - 2.1 -

3.6 2.5 - 2.5 - 2.5 -

LOW level input VO =0.1 V

voltage

1.2 - 0.3 - 0.3 - 0.3

2.0 - 0.6 - 0.6 - 0.6

3.0 - 0.9 - 0.9 - 0.9

3.6 - 1.1 - 1.1 - 1.1

HIGH level

VI = VIH or VIL 1.2 1.1 - 1.0 - 1.0 -

output voltage IO = -50 µÀ

2.0 1.92 - 1.9 - 1.9 -

3.0 2.92 - 2.9 - 2.9 -

3.6 3.52 - 3.5 - 3.5 -

LOW level

output voltage

VI = VIH or VIL

IO = -8 mÀ

VI = VIH or VIL

IO = 50 µÀ

3.0 2.48 - 2.34 - 2.20 -

1.2 - 0.09 - 0.1 - 0.1

2.0 - 0.09 - 0.1 - 0.1

3.0 - 0.09 - 0.1 - 0.1

3.6 - 0.09 - 0.1 - 0.1

VI = VIH or VIL 3.0 - 0.33 - 0.4 - 0.5

IO = 8 mÀ

Input leakage

current

VI = VCC èëè

0V

3.6 - ±0.1 - ±1.0 - ±1.0

Output OFF-

state current

3-state outputs 3.6 - ±0.5 - ±5 - ±10

VI = VIL or VIH

VO =VCC or 0 V

Suply current VI =VCC or 0 V 3.6 - 8.0 - 80 - 160

IO = 0 µÀ

Unit

V

V

V

V

V

V

µÀ

µÀ

µÀ

SLS System Logic

Semiconductor

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