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MC74HCT374A Datasheet PDF : 7 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
D Flip-Flop with
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
The MC54/74HCT374A may be used as a level converter for
interfacing TTL or NMOS outputs to High–Speed CMOS inputs.
The HCT374A is identical in pinout to the LS374.
Data meeting the setup and hold time is clocked to the outputs with the
rising edge of Clock. The Output Enable does not affect the state of the
flip–flops, but when Output Enable is high, the outputs are forced to the
high–impedance state. Thus, data may be stored even when the outputs
are not enabled.
The HCT374A is identical in function to the HCT574A, which has the
input pins on the opposite side of the package from the output pins. This
device is similar in function to the HCT534A, which has inverting outputs.
• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 276 FETs or 69 Equivalent Gates
• Improvements over HCT374
— Improved Propagation Delays
— 50% Lower Quiescent Power
— Improved Input Noise and Latchup Immunity
LOGIC DIAGRAM
DATA
INPUTS
D0 3
D1 4
D2 7
D3 8
D4 13
D5 14
D6 17
D7 18
CLOCK 11
2 Q0
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
NONINVERTING
OUTPUTS
PIN 20 = VCC
OUTPUT ENABLE 1
PIN 10 = GND
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Design Criteria
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Internal Gate Count*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Internal Gate Propagation Delay
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Internal Gate Power Dissipation
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Speed Power Product
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ * Equivalent to a two–input NAND gate.
Value
69
1.5
5.0
.0075
Units
ea.
ns
µW
pJ
2/97
© Motorola, Inc. 1997
1
MC54/74HCT374A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
ORDERING INFORMATION
MC54HCTXXXAJ
Ceramic
MC74HCTXXXAN
Plastic
MC74HCTXXXADW SOIC
MC74HCTXXXASD SSOP
MC74HCTXXXADT TSSOP
PIN ASSIGNMENT
OUTPUT
ENABLE
1
20 VCC
Q0 2
19 Q7
D0 3
18 D7
D1 4
17 D6
Q1 5
16 Q6
Q2 6
15 Q5
D2 7
14 D5
D3 8
13 D4
Q3 9
12 Q4
GND 10
11 CLOCK
FUNCTION TABLE
Inputs
Output
Output
Enable Clock D
Q
L
L
L
L,H,
H
X
H
H
L
L
X No Change
X
Z
X = don’t care
Z = high impedance
REV 7
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