ADV7403KSTZ-140(RevSpA) 데이터 시트보기 (PDF) - Analog Devices

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ADV7403KSTZ-140
(Rev.:RevSpA)

12-Bit, Integrated, Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer

Analog Devices 

ADV7403

4 All ADC linearity tests performed at input range of full scale − 12.5%, and at zero scale + 12.5%.

5 Max INL and DNL specifications obtained with part configured for component video input.

6 Specification for ADV7403KSTZ-140 only.

7 To obtain specified VIH level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,

then VIH on Pin 38 = 1.2 V.

8 To obtain specified VIL level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,

then VIL on Pin 38 = 0.4 V.

9 Pins 1, 2, 13, 14, 16, 19, 24, 29, 30, 31, 32, 33, 34, 35, 45, 78, 79, 83, 84, 87, 88, 95, 96, 97, 100.

10 Guaranteed by characterization.

11 VOH and VOL levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.

12 Pins 3, 13, 14, 19, 24, 29, 30, 31, 32, 33, 34, 45.

13 Analog current measurements for CVBS made with ADC0 powered up only, For RGB, ADC0, ADC1, and ADC2 powered up only, for SCART FB, all ADCs powered up.

Rev. SpA | Page 5 of 24

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