HMC981LP3E 데이터 시트보기 (PDF) - Analog Devices

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HMC981LP3E

ACTIVE BIAS CONTROLLER

Analog Devices 

v01.0411

HMC981LP3E

ACTIVE BIAS CONTROLLER

Pin Descriptions

Pin Number

Function

1, 5

VDD, VDIG

2

VG2CONT

Description

Bias supply Pin. Connect supply voltage

to this pin with appropriate filtering.

Control voltage of the VG2. Use a resistor divider between

VDD and GND to set the voltage. VG2 is typically 1.3V

lower than the VG2CONT

13

10

VG2

Second gate control.

3

SW

Internal switch resistance control pin. If left floating, VSW

defaults to HIGH.

4

EN

Enable pin. System is enabled when Ven is HIGH (VDIG). If

left floating, Ven defaults to HIGH (enabled).

14

DISBLSC

Disables short circuit lock down when pulled to ground.

Leave it floating to enable short circuit lock down.

Interface Schematic

Negative voltage generator charge pump output. Negative

6

CPOUT

voltage generator needs a flying capacitor, a reservoir

capacitor and two diodes to operate. Please refer to the

application schematic for more info.

Control pin for VGATEFB. Float VGATEFB when a

7

VGATEFB

depletion mode transistor is biased. Selects the mode of

operation along with VNEGFB pin. For detailed usage

please refer to the Table 2.

Feedback (Control) pin for Negative Voltage Generator

8

VNEGFB

Charge Pump. Float to activate the negative voltage

generator / Sort to GND to disable the negative voltage

generator.

Negative input to the chip. Should be supplied with CPOUT

when negative voltage generator is enabled, or connect to

9

VNEG

external VSS when negative voltage generator is enabled.

For detailed usage please refer to the “Negative Voltage

Generator” section.

13 - 7

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