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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

V436616Y24VATG-75PC 데이터 시트보기 (PDF) - Mosel Vitelic, Corp

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V436616Y24VATG-75PC Datasheet PDF : 12 Pages
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MOSEL VITELIC
V436616Y24VATG-75PC
5. If clock rising time is longer than 1 ns, a time (tT/2 -0.5) ns has to be added to this parameter.
6. Rated at 1.5V
7. If tT is longer than 1 ns, a time (tT -1) ns has to be added to this parameter.
8. Any time that the refresh Period has been exceeded, a minimum of two Auto (CBR) Refresh commands must be
given to wake-upthe device.
9. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command
is registered.
10. Referenced to the time which the output achieves the open circuit condition, not to output voltage levels.
11. tDAL is equivalent to tDPL + tRP.
V436616Y24VATG-75PC Rev. 1.0 October 2001
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